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CHEST 2021 Research Project Abstracts

P10_21: On-Chip Parallel-Processing RSSM Switching Power Regulator for EM/Power Side-Channel Security
Topic Areas: Hardware Side-Channel Reduction via Fine-Grained Asynchronous Circuitry System-Level Security Solutions; Parasitic EM Signature Obfuscation
Principal investigator: Prof. D. Brian Ma, University of Texas at Dallas
Co-Principal investigator: Dr. Yiorgos Makris, University of Texas at Dallas
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Non-invasive side channel attacks (SCAs) are highly powerful and cost-efficient attacks, which can obtain the secret key in a crypto circuit without the need for expensive measurement equipment. A side channel leakage can manifest itself in the form of electromagnetic (EM) emanations and power consumption profiles, among others. Although many researches have focused on power SCA countermeasures, combating EM SCAs becomes ever-increasingly crucial in the modern IoT era. In contrast to the need of physical probing in many power analysis attacks, EM SC leakage can be captured non-invasively using EM probes in the proximity of the encryption device. Recently, there has been a growing trend to integrate voltage regulators on-chip with modern system-on-chips (SoCs) as a countermeasure against power analysis attacks [1, 2]. However, there are several drawbacks in these works. First, these works do not address the EM SCA concerns. As a matter of fact, a power regulator, as a major system power process element, often exposes the fundamental risk of disclosing computing activities of a crypto circuit (as its power load) through its own magnified EM profile. Even for power SCAs, the LDO-based implementation [1] leaks critical information inherently. Because when an LDO keeps a constant supply voltage for a crypto circuit, its own supply current is exactly equal to the crypto circuit’s. On the other hand, recent switching regulator-based implementations can significantly reduce the power profile correlation between the power pin and a crypto circuit, thanks to the circuit’s complex nonlinearity. However, its dependence on loop gain parameter adjustments [2] reduces its effectiveness significantly because this action jeopardizes the closed-loop stability and is severely limited by low loop bandwidth.

To address these issues, this project proposes a parallel power injection/recycling approach orchestrated by a random spread spectrum modulation (RSSM) scheme on a switching regulator-based on-chip hardware platform. The randomized power injection process fundamentally masks and enciphers the crypto circuit power profile and EM spectrum in a highly nonlinear way. Because the power injection is implemented in a parallel structure, it has no interventions on the operations of either the switching regulator or the crypto circuit. The EM spectrum, controlled by the RSSM scheme, is chaos-based and time-varying, making it highly randomized and unpredictable. The injected power is recycled through the inherent power passives of the switching converter and reutilized for the crypto circuit’s operation. This project aims to discover a highly effective approach to enhance EM/power SCA resistance of crypto-ICs through a low overhead hardware platform, and to achieve a truly low cost “plug-and-play” security enhancement solution to a large variety of encryption-performing devices.