The CHEST portfolio is guided by the Industrial Advisory Board (IAB). The IAB shaped the overall technical direction of the CHEST portfolio by providing cyber security topic areas that addressed their top cybersecurity and trust priorities. The CHEST member universities created many proposals across the different topic areas. Finally, the IAB reviewed all proposals and voted on those proposals that best fulfilled cybersecurity priorities. IAB guidance has led to the sixteen best new cybersecurity and trust research projects that encompass a robust set of technologies and strengthen our national cybersecurity.
P1_21: On-Chip and Continuous Monitoring of EM Signals for Secure Microelectronics and its Obfuscation Techniques
Topic Areas: Parasitic EM Signature Obfuscation, New Approaches to Secure On-Shore Microelectronics Design and Manufacturing
Principal investigator: Dr. Rashmi Jha, University of Cincinnati
Co-Principal investigator(s): Dr. J. M. Emmert, University of Cincinnati
P1_21 Abstract
PI Email
P2_21: Memometer: Passive and Active Memory PUF-Based Hardware
Metering Methodology for Integrated Circuit Supply Chain Security
Topic Areas: Supply Chain Integrity
Principal investigator: Dr. J. M. Emmert, University of Cincinnati
P2_21 Abstract
PI Email
P3_21: Synthetic and Natural Benchmarks for Hardware Security and Trust
Topic Areas: Database of updated benchmark designs
Principal investigator: Dr. Ranga R. Vemuri, University of Cincinnati
Co-Principal investigator(s): Dr. J. M. Emmert, University of Cincinnati
P3_21 Abstract
PI Email
P4_21: Automated Synthesis and Validation of On-Chip Security Integrity Monitors
Topic Areas: On-Chip Monitoring of ASIC Integrity from Design Through Fabrication and Fielding
Principal investigator: Dr. Ranga R. Vemuri, University of Cincinnati
P4_21 Abstract
PI Email
P5_21: Towards Robust Cross-Device Side-Channel Attacks
Topic Areas: Side-Channel Attacks, Machine Learning
Principal investigator: Dr. Boyang Wang, University of Cincinnati
Co-Principal investigator: Dr. J. M. Emmert, University of Cincinnati
P5_21 Abstract
PI Email
P6_21: Reverse Engineering Methodology for FPGA Firmware
Topic Areas: Design Reverse Engineering, FPGA Trojans, Where’s Waldo
Principal investigator: Dr. J. M. Emmert, University of Cincinnati
Principal investigator: Dr. Ronald Williams, University of Virginia
Co-Principal investigator(s): Dr. James H. Lambert and Dr. Zachary Collier, University of Virginia
Co-Principal investigator(s): Dr. Ranga Vemuri and Dr. Carla Purdy, University of Cincinnati
P6_21 Abstract
PI Email
P7_21: ARIA: Additive Components for Hardware Reliability, Integrity, and Aging Monitoring
Topic Areas: IP Protection
Principal investigator: Dr. Rashmi Jha, University of Cincinnati
Co-Principal investigator(s): Dr. Marc Cahay, University of Cincinnati
P7_21 Abstract
PI Email
P8_21: NDIA Model for Security Countermeasures, Trust and Assurance of Microelectronics Manufacturing
Topic Areas: Systems Engineering and Risk Analysis
Principal investigator: Dr. James H. Lambert, University of Virginia
Co-investigator(s): Dr. Zachary A. Collier, Mr. Thomas L. Polmateer, University of Virginia
P8_21 Abstract
PI Email
P9_21: Risk Mapping for Mission and Business Assurance and Critical-
Device Protection
Topic Areas: Systems Engineering and Risk Analysis
Principal investigator: Dr. James H. Lambert, University of Virginia
Co-investigator: Dr. Zachary A. Collier, Mr. Thomas L. Polmateer, University of Virginia
P9_21 Abstract
PI Email
P10_21: On-Chip Parallel-Processing RSSM Switching Power Regulator for EM/Power Side-Channel Security
Topic Areas: Hardware Side-Channel Reduction via Fine-Grained Asynchronous Circuitry System-Level Security Solutions; Parasitic EM Signature Obfuscation
Principal investigator: Prof. D. Brian Ma, University of Texas at Dallas
Co-Principal investigator: Dr. Yiorgos Makris, University of Texas at Dallas
P10_21 Abstract
PI Email
P11_21: Scalable Security Verification Framework for Digital and Analog/Mixed-Signal System-on-Chips
Topic Areas:
Principal investigator: Dr. Kanad Basu, University of Texas at Dallas
Co-Principal investigator: Dr. Yiorgos Makris, University of Texas at Dallas
P11_21 Abstract
PI Email
P12_21: Stochasticity, Polymorphism and Non-Volatility: Three Pillars of Security and Trust Intrinsic to Emerging Technologies
Topic Areas: Security and Trust in Emerging Technologies
Principal investigator: Dr. Joseph S. Friedman, University of Texas at Dallas
Co-Principal investigator: Dr. Yiorgos Makris, University of Texas at Dallas
P12_21 Abstract
PI Email
P13_21: CAD Flow Development for Design Obfuscation through Post-Fabrication Transistor-Level Programming (TRAP)
Topic Areas: IP Protection
Principal investigator: Dr. Yiorgos Makris, University of Texas at Dallas
Co-Principal investigator(s): Dr. Carl Sechen and Dr. Benjamin Carrion Schaefer, University of Texas at Dallas
P13_21 Abstract
PI Email
P14_21: Design Obfuscation and Performance Locking Solutions for Analog/RF ICs
Topic Areas: Security and Trust Solutions for Analog/Mixed-Signal/RF Circuits
Principal investigator: Dr. Yiorgos Makris, University of Texas at Dallas
Co-Principal investigator(s): Dr. Ken O, Dr. Andrew Marshall, University of Texas at Dallas
P14_21 Abstract
PI Email
P15_21: Formal Security Evaluation of Executing Untrusted Binaries on Embedded Processors
Topic Areas: System-Level Security Solutions
Principal investigator: Dr. Kevin Hamlen, University of Texas at Dallas
Co-Principal investigator: Dr. Yiorgos Makris, University of Texas at Dallas
P15_21 Abstract
PI Email
P16_21: Persistent Cache Monitor to Combat Ransomware
Topic Areas: Ransomware countermeasure
Principal investigator: Dr. Yunsi Fei, Northeastern University
Co-Principal investigator: Prof. Aidong Adam Ding, Northeastern University
P16_21 Abstract
PI Email
P17_21: Secure RISC-V Processor Design, Implementation, and Simulation
Topic Areas: Design
Principal investigator: Dr. Yunsi Fei, Northeastern University
Co-Principal investigator: Dr. David Kaeli, Northeastern University
P17_21 Abstract
PI Email
P18_21: Analog Trojan Detection Circuits and Validation Methods
Topic Areas: Design, Security and Trust in the analog/MS/RF Domain
Principal investigator: Dr. Aatmesh Shrivastava, Northeastern University
Co-Principal investigator: Dr. Yunsi Fei, Northeastern University
P18_21 Abstract
PI Email
P19_21: Is ARM TrustZone Trustable?
Topic Areas: Security Attacks, Side-channel Attacks
Principal investigator: Dr. Yunsi Fei, Northeastern University
P19_21 Abstract
PI Email
P20_21: NATE: A Neural Network Assisted Timing Profiler for Hardware Trojan Detection
Topic Areas: Hardware Trojan
Principal investigator: Dr. Houman Homayoun, University of California Davis
P20_21 Abstract
PI Email
P21_21: SHERLOCK: Power Side Channel Attack-Resilient Hardware using Emerging
Reconfigurable Devices and Logic Locking
Topic Areas: New Approaches to Secure On-Shore Microelectronics Design and
Manufacturing
Principal investigator: Dr. Houman Homayoun, University of California Davis
P21_21 Abstract
PI Email
P22_21: Do you Trust Your Standard Cell Library?
Trojan Resilience Untrusted Cell Library Analysis, Detection and Mitigation
Topic Areas: New Approaches to Secure On-Shore Microelectronics Design and Manufacturing
Principal investigator: Dr. Houman Homayoun, University of California Davis
P22_21 Abstract
PI Email
P23_21: Managing Security through the Hardware Lifecycle with Risk-Based Standards
Topic Areas: Electronic HW and System Security, Risk Mitigation
Principal investigator: Dr. John Chandy, University of Connecticut
Co-Principal investigators: Dr. James Lambert, Dr. Zachary Collier, University of Virginia
P23_21 Abstract
PI Email
P24_21: Secure Cloud-based Image Fusion, Analysis and Visualization Platform for Security Assessment of Electronics
Topic Areas: AFRL Topics
Principal investigator: Dr. Sina Shahbazmohamadi, University of Connecticut
P24_21 Abstract
PI Email