P18_21: Analog Trojan Detection Circuits and Validation Methods
Topic Areas: Design, Security and Trust in the analog/MS/RF Domain
Principal investigator: Dr. Aatmesh Shrivastava, Northeastern University
Co-Principal investigator: Dr. Yunsi Fei, Northeastern University
Under the new horizontal business model for the global semiconductor industry, fab-less design companies are relying on untrusted foundries for chip fabrication, rendering their designs vulnerable to manufacturing time attacks through hardware Trojan insertion. Emerging Analog Trojans such as A2, large-delay Trojans, and row-hammer are far stealthier than previously known digital Trojans. They are smaller sized, do not rely on inputs for triggering, and the trigger for their payload can be made very/arbitrarily long, like a ticking time bomb. Due to their novel nature and incompatibility with the digital design and validation flow, analog Trojans can easily evade detection. In this project, we propose current signature-based detection scheme, which can be effective for catching various analog Trojans at both run-time and production time validation. The proposed work will include advancing analog Trojans detection through transient variation in the power supply current. This detection method can be used at run-time to potentially fence off activation of analog Trojans in field through early warning signals. A low-cost and fast production-time validation scheme will also be developed to catch Trojans during mass production. The validation method will be made compatible with the conventional design-for-test (DFT) flow. We will evaluate our design and validation methods using a prototype chip to show their effectiveness in preventing Trojan attacks on a RISC processor and other mixed-signal circuits.